For a switching operation of a voltage-driven-type semiconductor device of which typical examples are MOS-FET (Metal-Oxide-Semiconductor Field-Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor), a driving apparatus is applied for charging and discharging the gate of the semiconductor device in response to an on/off control signal.
It is known that there is a trade-off relation, in such a switching operation, between the magnitude of power loss of the semiconductor device (so-called switching loss) and the magnitude of electromagnetic noise generated by the semiconductor device. Specifically, increase of the gate charging/discharging speed for the purpose of reducing the switching loss results in increase of the electromagnetic noise, while decrease of the gate charging/discharging speed for the purpose of reducing the electromagnetic noise results in increase of the switching loss.
It is desired for a semiconductor device driving apparatus to improve this trade-off and drive the semiconductor device with reduced loss and reduced noise.
Japanese Patent Laying-Open No. 2012-147492 (PTL 1) discloses that in turning on a semiconductor device, the output voltage of a driving apparatus for charging the gate is set lower during a period after a predetermined timing in a Miller period of the gate voltage, than the output voltage during a period before the predetermined timing.
Japanese Patent Laying-Open No. 2013-179390 (PTL 2) discloses that a charge pump circuit is used to charge the gate of a semiconductor device, and discloses a manner of control in which a capacitor of the charge pump circuit is discharged at a predetermined timing prior to the end of a Miller period of the gate voltage in turning off the semiconductor device, to thereby reduce the gate discharging speed after the predetermined timing.